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    #15859
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    vipul
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    One of the common limitations of usb based softwares…

    #15858
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    vipul
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    Hi siva
    i can see that number of inputs in upper arm is 7 and lower is 6.but after correcting it still the output is not coming.This xor gate is not using laser light as CW beam so it is not working on the principle of xpm.so i am not sure how to correct it

    #15814
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    vipul
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    Hi
    Simply screen print it and paste it in paint,change type file as .png and save.

    #15757
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    vipul
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    SORRY ATTACHMENT FAILED ABOVE

    Attachments:
    #15756
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    vipul
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    ATTACH FILE

    #15321
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    vipul
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    HELLO SIVA
    THE ERROR IN OUTPUT IS BECAUSE OF CARRIER RECOVERY LIMITATION IN SOA .WHENEVER LONG STING OF PULSES (CONTINOUS 1) TRAVELS THROUGH SOA THERE IS A PROBLEM OF CARRIER RECOVERY (EACH PULSE ABSORBS ACTIVE CARRIER IN SOA …MANY PULSES CAUSES IN DEPLETION OF CARRIERS) IN SOA.MORE DETAIL U CAN FIND IN INTERNET SIVA JUST TYPE ” CARRIER RECOVERY TIME IN SOA” OR
    http://www.opticsinfobase.org/ol/abstract.cfm?uri=ol-27-18-1625

    http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=5405172&url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel5%2F5361200%2F5405166%2F05405172.pdf%3Farnumber%3D5405172

    #15104
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    vipul
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    YA SIVA U ARE RIGHT.CAN U ATTACH THE PROJECT FILE WITH CORRECT DELAY FOR ME PLEASE.

    #15067
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    vipul
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    THANKS DAMIAN FOR YOUR HELP.YOU GUYS ARE DOING GREAT JOB!!!!

    #14991
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    vipul
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    I AM ADDING A PROJECT FILE AND WANT TO SEE EYE DIAGRAM.CAN I ATTACH BER ANALYZER BOTH WAYS? I AM UNABLE TO CONNECT BER ANALYZER WITH USER DEFINED PULSE GENERATOR(AS SHOWN IN DIAGRAM ATTACHED BY HEITOR)-LESSON 3 (NOT LESSON 3C)
    CAN ANYBODY HELP.

    #14975
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    vipul
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    THANKU HEITOR…. IT REALLY HELPED AND THANKS AGAIN FOR TAKING PAIN IN ATTACHING ALL THESE FILES

    #14718
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    vipul
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    Hi shiva u aRE GETTING RIGHT OUTPUT AS I CAN SEE IN FIGURE.THE OUTPUT IS REPEATED 0110111101101111

    #14516
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    vipul
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    HI ALL
    I AM UNABLE TO GENERATE xor OUTPUT(PROJECT ATTACHED) IF I INCREASE SPEED TO 40 Gbps.CAN ANYBODY HELP

    #14165
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    vipul
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    Its Nor logic

    #14163
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    vipul
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    Thank you for yr concern.Paper is attached where attenuator and delay line is used.See diagram for xnor logic.

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    #14161
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    vipul
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    Thank u Damian for yr concern.I am attaching a paper in which xor operation is performed .The xor gate designed by me is giving correct xor value(attached) but i am unable to understand the principle behind getting an xor value at output of interferometer.