Home Forums GENERAL synchronous heterodyne receivers

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    • #40661

      I want to implement synchronous heterodyne receiver in optisystem. how it is possible to implement phase-locked loop with APD and amplifiers? please Help!

    • #40662

      here is the block diagram of receiver. I want to implement it in optisystem. please help!

    • #40667
      Aabid Baba
      Participant

      Hello Zubair,
      As far as your query is concerned, it has been already mentioned in one of the threads by Damian. I would be sharing the link. I hope this will help you and I believe this might give you an idea about how to implement a feedback system in optisystem.
      Try going through this link.

      Feedback and Individual Samples [Optical System]

      Regards

    • #40668

      Hi.
      As already mentioned by Mr.Aabid that this has been already discussed on the forum before, I want to add that It has been rightly mentioned that in OptiSystem a signal is generally expressed as a sampled signal, which is passed to a component in one chunk. To perform time domain calculations, like feedback, the sampled signal must be converted to individual samples, which consist only of a single signal value and its corresponding position in time. This allows OptiSystem to propagate the samples through different components at different times. The attached project file Electric_Phase_Locked_Loop.osd is an example of an electrical feedback system.
      You can follow the tutorial on this example at:

      Electrical PLL

      I hope this will be helpful to you.
      Thanks
      Regards

      • #40672
        Aabid Baba
        Participant

        Hello Hamza Ali Abbas,
        Thank you for providing the example . This will be largely helpful to Muhammad Zubair as far as his requirement is concerned.
        Regards

    • #40674

      Respected Friends
      thanks for help. As same i have implemented in my receiver section but failed to demodulate the signal. i am attaching my work in optisystem. kindly check and point out the mistake(s) in my work.
      MAIN PURPOSE:
      demodulate signal by using PLL.
      1) system works correctly uptill Photodiode and AGC amplifiers. Ahead i am facing problem to demodulate signal by using phase locked loop (PLL).
      Highly thankful.

    • #40676
      Aabid Baba
      Participant

      Hello Muhammad Zubair,
      I don’t have access to the tool at the moment so I can’t view your .osd file right now.
      you using which visualiser after the photodiode to visualise the signal?
      Actually I am not aware about the functionality of phase locked loop in optisystem. What component are you exactly using for demodulation of the signal. I would be glad if you share this information.
      Regards

    • #40677

      Hello Dear Aabid Bada!
      i am attaching snapshot of my work, please check this out,after photodiode and AGC amplifier i want to demodulate signal using PLL.

    • #40680

      here is the paper i want to simulate.

    • #40683
      Aabid Baba
      Participant

      Hello Muhammad Zubair,
      I am not able to infer the functionality of your design. In case of demodulation what are you using combiner for?

    • #40684

      Hello Aabid Baba,
      what should i used instead of combiner? how to move forward? after AGC amplifier?

    • #40685
      Aabid Baba
      Participant

      Hello Muhammad Zubair,
      The way you have used your components in the design I don’t think it forms a proper feedback loop. You better look at the example provided by Hamza Ali.
      If still you face a problem I suggest you to private message Damian. He would definitely help you in this regard.

      Regards

    • #40686

      okk thanks Aabid Baba!

    • #40687
      Aabid Baba
      Participant

      Hello Muhammad Zubair,
      You are welcome anytime. I hope you problem gets resolved as soon as possible.
      All the best (y). Regards

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