simulation of half adder - Optiwave

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This topic has 5 replies, 2 voices, and was last updated 6 years, 3 months ago by VIVEK YADAV.

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- January 5, 2018 at 6:45 am #47295
  
  VIVEK YADAV
  Participant
  
  hi,
  i attached a file ,which i have simulated half adder circuit in optisystem 7 but i am unable to find out clear output,i used bit rate 10 gbps ,i found more spike in output so it did not claerify,please suggest improvement.
- January 5, 2018 at 7:50 am #47302
  
  Mohamed A. A. Abouseif
  Participant
  
  Hi,
  pls attach your file, so I might have a look and help.
  in the mean time, my advice is to trace the signal and check where there is no output then you can figure out what the problem is.
  
  thanks
  Mohamed
- January 5, 2018 at 10:04 am #47303
  
  VIVEK YADAV
  Participant
  
  Sorry ,because lab is closed and optiwave on only lab system so I will attach file monday (working day).
  Thanks
  Vivek
- January 5, 2018 at 10:07 am #47304
  
  VIVEK YADAV
  Participant
  
  I already attach .osd file but,it shows due to security reasons that file not permitted ,then how I attach that file ?
  Please
- January 8, 2018 at 12:11 am #47310
  
  VIVEK YADAV
  Participant
  
  hi i’m attaching file
- January 8, 2018 at 12:19 am #47311
  VIVEK YADAV
  Participant
  hi
  i’m attached optical half adder in .png formate,because .osd can not be attached due to security reason.
  Attachments:
  optical-half-adder-1.png
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