- This topic has 5 replies, 4 voices, and was last updated 8 years, 7 months ago by FAYIQA NAQSHBANDI.
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March 12, 2016 at 5:27 am #32557Ranjeet KumarParticipant
Hi everyone,
I am facing problem in simulation of Twdm pon because when i simulate the design , during simulation a long time has been used in simulation of Buffer selector although i Have used only two Buffer selector in Transmitter ONU 1 and 2. But when i see during simulatio it shows simulation of Buffer selector. I have waited for nearly 45 minutes but not simulation completes. could anyone suggest how to get rid of that problems. When i remove buffer selector i get simulation completes in 1 minutes but not get BER and Q-factor in Uplink direction. -
March 12, 2016 at 12:27 pm #32574Aabid BabaParticipant
Hello ranjeet,
Are you using buffer selectors for in cooperating delay in the design? I presume so..
regards -
March 12, 2016 at 12:49 pm #32575ZULKARNAINParticipant
hi ranjeet kumar….
Well i think Buffer selector is used for iteration in our layout mean you can select the particular iteration result through this buffer selector.
As already discussed by Damian Marek in one of the post the buffer selector is a simulation tool to grab certain signals (from the different signal iterations) generated in bidirectional or loop simulations.
As suggested by him you can go through the bidirectional tutorial:Lesson 5: Bidirectional Simulation — Working with Multiple Iterations
With regards -
March 12, 2016 at 12:53 pm #32576ZULKARNAINParticipant
As for as your error is concerned it may be because of buffer selector when it calculates again n again then reason would be any free port.check all the ports in system if any port is free then attach null signal there.
For your reference i am attaching few links in which you might find some help regarding this problem,
with regards -
March 13, 2016 at 12:48 am #32593Ranjeet KumarParticipant
Hi Aabis sir,
I have already upload the osd file of my design , you can recheck the osd file and help me. -
March 13, 2016 at 10:21 am #32639FAYIQA NAQSHBANDISpectator
Hi ranjeet
If you are using multiple iterations in your design but you wish to check the output only for a specific iteration,buffer selector can be used to select the required iteration.
But I don’t think the system should take longer to simulate just because you are using a selector in your design.Anyway if that is an issue you can run your simulation without the selector because anyway its significance is to filter out the required iteration to make the result evaluation easier.
And for BER and Q.Factor US results increase the signal index which you can find on the right top extreme of the analyser window.Hope all this helps
Regards
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