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error in optisystem

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(joined May 2014)
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can any one help me with that problem , when i increase the number of sequence length generated from bit sequence generator to around one million i get that error : CIDScheduler error while calculating the component i try to test many samples but i get the same error !!!

Responses (6):

    • #11622
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      mai fouad
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      can any one help me with that problem , when i increase the number of sequence length generated from bit sequence generator to around one million i get that error : CIDScheduler error while calculating the component i try to test many samples but i get the same error !!!

    • #11645
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      Damian Marek
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      Hi,

      It could be the large sequence length you are using. To be sure try with a smaller sequence length. If that doesn’t work please send me your project file or layout and I’ll take a look at it.

    • #11651
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      mai fouad
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      yes i use sequence length =1048576 bits as my system has a small BER around 10^-5 so i need to test the system with million bits , is there another method to test huge number of bits in optisystem

      • #11652
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        Damian Marek
        Participant

        It might be the way your system is set up. Could you send me your project file? Have you tried the BER Analyzer or BER Test Set?

    • #11653
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      mai fouad
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      here is my project and the m-file called in the project but it will take long time to run also if i try another project and put the sequence length as i mentioned i get the same error

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      • #11667
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        Damian Marek
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        I really don’t think using a million bits here is required. I think you could get an accurate picture of the BER by using considerably less. However, you can try removing many of the visualizers. Each visualizer will save the data of the signal, which will take up a lot of memory while the program is running. It will slow down the simulation considerably. Try removing all but the essential ones you need. Make sure that the data monitors are taken off too. They are the small rectangular icons on the output ports of components.You can use the Data Monitor tool on the right hand side of the layout to remove them. I have attached a picture of where they can be found.

        The Matlab component at the end is causing an error for me, because there is no associated m-file.

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    • #11695
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      Luis Acevedo
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      thanks 🙂

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