You can also refer to the osd file i have attached below. It is based on bidirectional fiber and how to get a signal at the output. The problem you are facing is because you may have kept the layout iteration= 1. Double click on the simulation window and change the iteration number to 3 or 4 even 5 if you are using more than one bidirectional components. It should work fine then. I hope it will be helpful to you.