how to separate even and odd bit.

[Debanjan Sarkar]

hi
How to separate even and odd bit from a bit stream and i want the odd bit to be delayed by 1 bit period how to do that without using PSk generator and electrical signal time delay.
i have tried with PSK generator and electrical signal time delay. when i used the delay block the last portion the odd bit stream is adding with the first portion but i donot need that.i want the odd bit stream to be shifted by one bit period i.e the portion from 0s to one bit period should be zero.i have the waveform that i need.
Thank you

[Ashu verma]

Hi Debanjan
Interesting question,may i ask is this your own idea or requirement? Or you trying to reproduce some research article? If this is from research article then kindly attach the paper for better understanding
Thsnk you

[alistu]

Hi Debanjan,

Since I cannot understand clearly what you intend to do (by delaying just odd shifts, the odd and even shifts are simultaneosly there), can you kindly introduce any paper you are doing the current work on the basis of? Thank you very much.

Regards

[Damian Marek]

I am not sure what you mean either. When you say odd bits do you mean binary sequences that make up odd numbers? Or do you want to split the binary sequence in two with every other bit in one of the two streams.

[Debanjan Sarkar]

i want to implement MSK system on my own rather than using MSK modulation block.
yes,i want to split the binary sequence in two with every other bit in one of the two streams.In MSK system i need In- phase bit and Q- phase bit and in the Q-phase i need to do delay by 1 bit duration . i have separated the bit stream using psk sequence generator but delay portion showing some problem. please check the attachment. and compare the q-phase output of my design and q-phase output of msk generator. Then you will find that my delay is not working properly and please suggest me how to get that delay as in msk generator.

[alistu]

I think in this case, you can use two separate PRBS generators, and set the bit rate and sequence length in the layout parameters as half of what you intend to set for your whole system (for example, if your system should have a bit rate of 10e9, set the bit rate 5e9). And you can use two BER analyzers (or BER Test Sets) for the two PRBS generators (In case you use BER Test Set, you don’t need to use PRBS generators).

P.S. There is no attachment to your post.

[Debanjan Sarkar]

Thank you for your reply.
sorry…here is the attachment.

[alistu]

Thank you for attaching the file. I think you can do as I have suggested in my former comment. you can assume each of the PRBS generators correspond to either odd or even bits. And changing the bit rate in the way I told you would eliminate the need for using time delay. Finally, the use of a separate BER analyzing component for each PRBS ensures you can get the total BER by using the mean value of the two BER values.

Regards

[Debanjan Sarkar]

Hi alistu
I have attached the osd file please check and help me.

[alistu]

Refer to #25277 please.

[Debanjan Sarkar]

Thank you Mr. alistu.

[alistu]

You’re welcome!

[Debanjan Sarkar]

Hi Alistu
I have understand what you have written in your earlier comments. But i need one more help from you can you suggest me how will I get wave from as in Q-arm of msk genertor from my design as i have already attached. I think i am getting the waveform in I-arm and also getting the waveform in Q-arm also but delay block is giving some problem.what parameter i have to change to gave the desired waveform after delay.please help.
please find the attachment of .osd file and my output and desired output. visualizer 7 shows my output and visualizer 17 showing msk generator output of Q -arm.

If anyone have the solution then please help.
thank you

[alistu]

Hi Debanjan,

Unfortunately, I can neither figure out why the delay component is not making any delays. I even used another delay component after the sine wave generator and still, the visualizer shows the signal beginning from zero (in time domain). I will let you know if I manage to solve the problem.

[Debanjan Sarkar]

Thank you for your reply.
Is there any one who is from Optiwave?? May be he can do something related to this

[Damian Marek]

If I were you I would use the Serial to Parallel component for making the two separate bit streams. Also as mentioned in other posts the “Delay” component is a bit confusing but it does not introduce a time delay. It is used to create a null signal for bidirectional components so that they can be simulated. You should be using the Time Delay component in the Passives Library.

[Debanjan Sarkar]

Dear Damian Marek,
Yes, I am using the delay from passive library. What delay shall i use to get the desire output??please explain.

Actually i am working on MSK and i Have implemented it in MATLAB and now want to implement the MSK modulation step by step in opti system. so i followed the inbuilt structure of MSK modulation that is in the component library and there is delay. PLease see the attachment in replay #25326 above. I have attached the step by step .osd file inducing the MSk generator.
I am getting the waveform in my design like MSk generator in I- arm. But I am not getting the output waveform in Q-arm as per the MSk generator. I have attached the waveform also.
Please check and Inform me if i have done anything wrong in design as i need to implement this urgently.

As you have mentioned in earlier reply “Delay” component is a bit confusing.please explain me as i want to clear the concept.
Thank you.

[Debanjan Sarkar]

Dear MArek,
Is there any serial to parallel component in optisystem?
Thank you

[alistu]

Hi Debanjan,

The serial to parallel component is there in the signal processing library, in the “Binary” folder in the “Tools” section. However, I think it has been added since Optisystem v. 9 and therefore you can’t use them in v.7 (but please check for it). As for what you asked about “electrical time delay” component, I can access it in version 13 in “passive library” and inside “electrical” folder. It has the same function as what you were looking for here, so there should not be any confusion.

Regards

[Debanjan Sarkar]

Dear alistu
I have used the electrical time delay from passive library-> electrical folder as you can see from .osd file. is there any delay component which can delay the signal by one or required time duration as required in my design?
thank you

[alistu]

You’re right. I have addressed the component Damian has proposed, but you have already used it. This is the component that is supposed to make the delay you want to make, according to Damian’s statement. The other component, “Delay”, is the one Damian has probably thought you had been using.

[Debanjan Sarkar]

thank you alistu
may be.what you told is right.but i need the delay which can shift the signal by one bit. I am trying my level best to find the solution but unable to solve the problem why delay is not working?need help from Damian. may be he can help.
thank you.

[Damian Marek]

The Electrical Signal Time Delay is working for me. The scale of the attached photos is in bit period and you see the edge shift from the 2 position to the 3 position, demonstrating the proper delay. It might be hard to see visually because your sequence length is so short and the samples per bit is pretty low. The other thing that could be confusing you is the PSK Sequence Generator is slowing the symbol rate from “Bit rate” to “Bit rate/2”.

[Debanjan Sarkar]

Thank you Mr. Damian Marek
Actually i am also getting the same waveform as you have send.
But in this case the last portion of the signal is coming infront of the first bit.But i need the signal should start after the delay duration. please see the attachment for better understand my problem what type of delay actually i need.
Help me and suggest me what to do t get such signal.after delay.
thanks

[Damian Marek]

I see, thanks for the explanatory picture. This is expected operation of the component because since the computer program can not represent an infinite time window any data that is delayed passed the largest time is simply looped back to the front. You will see this also happens in long fiber simulations with lots of dispersion.

A simple solution would be to increase the layout parameter sequence length to a larger value. Then in the bit sequence generator changed the leading and trailing zeros to a large enough value that the bits sequence can be delayed without reaching the end of the time window.

Regards

[Debanjan Sarkar]

thanks for your reply . please see the attachment.

[Damian Marek]

The only difference between your signals is that delay section which ends up have little effect on the demodulated signal. The MSK Pulse Generator is probably hard codes to output the 0 signal for the first bit period while the delay component does not work like that.

If you really want the exact same signal you could use an electric multiplier as in the attached project to force it to 0. I multiply it by a bit sequence of “011111111” because I changed the total bit sequence to a longer one.

[Dr. Dhiman Kakati]

Hi Damian,
the design file you have attached in reply no. 26024 is using MSK sequence generator but the constellation is not that for MSK.
please check once.

Regards

[Sanjeev kumar]

w can we use the component in reverse as said in the replies?

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