Home › Forums › GENERAL › lsunching power limit › Reply To: lsunching power limit
April 2, 2016 at 11:03 am
#34525
Hi ankita sharma,
I agree with aasif bashir that you might be facing the problem of using optiacal delay component, as no signal is shown in the uplink after delay component.. What you need to do is to add few sweep iterations and simulate your design..Also as suggested by Fayiqa Naqshbandhi try consulting videos on using bidirectional components.. Hope this helps..
Regards
Sahil Singh
Categories
- All
-
Knowledge
Contains a detailed Q&A knowledge base. -
General
All non-technical questions. -
System
Optical system design and analysis. -
Instrument
Communicate and control different kinds of instruments. -
SPICE
Opto-electronic circuit design. -
FDTD
Finite-Difference Time-Domain simulation. -
BPM
Beam Propagation Method analysis and design. -
Grating
Fiber optic grating simulation. -
Fiber
Optical fiber design and characterization. -
Exchange
Users can exchange design files.
(Matlab, C++, etc.)