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    #61444
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    muhammad jawad
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    You may find the simulation file .osd in introductory tutorials as well.
    regards

    +1
    #60290
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    muhammad jawad
    Participant

    Dear Mohammad
    If you are using an older evaluation version than optisystems 16 e.g optisystem 14, then download a newer version like 15 or 16 and your project file will be opened in both of these versions i.e 15 and 16

    regards

    #60289
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    muhammad jawad
    Participant

    I also also understand that Mr Adnan is asking about how to design logic gates using nonlinear effects. The answer of Sir Ahmad is appropriate. For instance, an all-optical inverter is easily can be implemented using XGM in SOA. A lot of literature can be found easily using digital libraries.
    regards

    #60088
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    muhammad jawad
    Participant

    Dear sir,
    i have sent the project file at your email address. Looking forward something great as before

    regards

    #59694
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    muhammad jawad
    Participant

    Dear Josh

    Thanks for imparting good relevant information regarding chaotic laser. Can we have your email address.?
    regards

    #56072
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    muhammad jawad
    Participant

    ok sir thanks

    #55956
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    muhammad jawad
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    Sir i have drawn a LI curve at 1 Gbps data, Modulation peak current =10mA, Bias current sweeps from 0 to 25mA. I gets a circular type curve as shown in Fig attached. How to get a linear straight curve like DML laser so that VCSEL can be biased at middle of this linear region?

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    #55953
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    muhammad jawad
    Participant

    Please sir tell me, in order to operate VCSELs like DMLs, we have to find its LI characteristics curve and then bias it at the half of the middle point of the LI curve?

    #54295
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    muhammad jawad
    Participant

    Dear Sir

    Thanks for your reply. As i have worked over optical communication over multimode fiber (MMF), i just need to know how to mathematically write LP modes in MMF. The optiwave tutorials well explain working over MMF but not give required information. If you have relevant literature, do share with me sir.
    I will be very thankful
    Regards

    #53986
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    muhammad jawad
    Participant

    Thanks Sir

    #53984
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    muhammad jawad
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    Thanks Sir

    #52600
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    muhammad jawad
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    Thnx sir ahmad

    #51914
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    muhammad jawad
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    ok sir thanks for everything

    #51912
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    muhammad jawad
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    thanks sir, i understood it fully

    #51860
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    muhammad jawad
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    If PRBS is set at 10Gbps with Probability checked, then what will be selection of clock at DEMUX side?