Hi Taiwo,
You can setup a parallel-to-serial (PS) binary component at the transmitter and then a serial-to-parallel binary component at the receiver. For example, 4 separate lower bit rate signals (each at say 2.5 Gbps) can be combined to form a 10 Gbps signals at the transmitter and then de-multiplexed back to separate 2.5 Gbps signal at the receiver. For this design the only limitation is that the time slot is a bit period. If you want to simulate larger TDM frames then I recommend using our MATLAB component. Using MATLAB you can more easily organize the bit sequences into frames at the transmitter and receiver.
I hope this helps. Cheers